The investigation described, in this is designed to produce a digital closed loop speed control system for a d.c. motor using a thyristor power amplifier and a digital, minicomputer as integral components of the system. The thyristor amplifier is direct digitally controlled and also has digital current limiting protection. A digital form of a conventional analogue proportional controller, and a scheduled controller based on pre-recorded performance characteristics for the motor are first discussed, but rejected as impractical because of the complexity of the resulting system. Control based on a bang-bang principle with a variable mode switching control action designed to minimise limit cycling is then introduced. This method is shown to produce very acceptable performance using quite simple system software and appears to be immediately applicable to microprocessor implementation. A further refinement, that of dual or adaptive sampling designed to further reduce limit cycling effects in steady state operation, is then introduced. A control or switching matrix is developed as a design method for the switching controller which functions when the control computer recognises the required operating region for the motor as defined by signum functions of error and error rate within the system. The final controller uses multi-mode operation in which the loop gain and feedback constants are controlled as a function of error and error rate. It also incorporates an adaptive sampling period, and results in a digital speed control system which has both simple hardware and software. Suggestions for methods of further improving performance using a system of parallel processing with a view to using a microprocessor as the control computer, but still retaining system simplicity, are also discussed.
|Date of Award||1977|