Abstract
A general design methodology for arithmetic operators in current mode multiple value logic is described. It is based on the interconnection of single output functions of one current, quantizers, through summing nodes and current replicator circuits. Some quantizers are known already: radix 4 sum and carry circuits. The authors present new circuits for the discrete pseudologarithm and antilogarithm, which together give a single digit multiply circuit. These form a complete set that allows any arithmetic circuit to be constructed
| Original language | English |
|---|---|
| Pages | 3001-3004 |
| Number of pages | 4 |
| DOIs | |
| Publication status | Published - 1992 |
| Event | IEEE International Symposium on Circuits and Systems (ISCAS '92) - San Diego, CA, USA United States Duration: 10 May 1992 → 13 May 1992 |
Conference
| Conference | IEEE International Symposium on Circuits and Systems (ISCAS '92) |
|---|---|
| Country/Territory | USA United States |
| City | San Diego, CA |
| Period | 10/05/92 → 13/05/92 |
Bibliographical note
Vol. 6Keywords
- VLSI arithmetic
- integrated logic circuits
- arithmetic circuit
- current mode multiple valued logic
- many-valued logics
- single digit multiply circuit
- discrete pseudologarithm
- antilogarithm
- VLSI
- logic design
- design methodology
- digital arithmetic
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