Rail-to-rail CMOS complementary input stage with alternating active differential pairs

M. R. Valero; A. Roman-Loera; J. Ramírez-Angulo; N. Medrano; S. Celma

doi:10.1109/ISCAS.2014.6865395

Rail-to-rail CMOS complementary input stage with alternating active differential pairs

M. R. Valero, A. Roman-Loera, J. Ramírez-Angulo, N. Medrano, S. Celma

Department of Electronic & Electrical Engineering

Research output: Chapter or section in a book/report/conference proceeding › Chapter in a published conference proceeding

6 Citations (SciVal)

Abstract

A simple and power efficient scheme for input rail-to-rail Op-Amp operation with constant g m and CMRR over the common mode input range is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. Three implementations of the scheme are discussed. They use very compact control circuitry to turn only one of the differential pairs at a time. Simulations and experimental verification of the proposed scheme are provided from a test chip prototype in 0.5μm CMOS technology.

Original language	English
Title of host publication	2014 IEEE International Symposium on Circuits and Systems (ISCAS)
Place of Publication	USA
Publisher	IEEE
Pages	1356-1359
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2014.6865395
Publication status	Published - 28 Jul 2014
Event	IEEE International Symposium on Circuits and Systems (ISCAS 2014) - Melbourne, Australia Duration: 1 Jun 2014 → 5 Jun 2014

Conference

Conference	IEEE International Symposium on Circuits and Systems (ISCAS 2014)
Country/Territory	Australia
City	Melbourne
Period	1/06/14 → 5/06/14

Keywords

CMOS analogue integrated circuits
operational amplifiers
CMRR
active differential pairs
common mode input range
compact control circuitry
complementary differential pair
input rail-to-rail op-amp operation
rail-to-rail CMOS complementary input stage
size 0.5 mum
test chip prototype
CMOS integrated circuits
MOS devices
Power dissipation
Rail to rail amplifiers
Rails
Transistors
Voltage control
CMOS Op-Amps
amplifiers
analog integrated circuits
rail -to-rail

Access to Document

10.1109/ISCAS.2014.6865395

Cite this

Valero, MR, Roman-Loera, A, Ramírez-Angulo, J, Medrano, N & Celma, S 2014, Rail-to-rail CMOS complementary input stage with alternating active differential pairs. in 2014 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, USA, pp. 1356-1359, IEEE International Symposium on Circuits and Systems (ISCAS 2014), Melbourne, Australia, 1/06/14. https://doi.org/10.1109/ISCAS.2014.6865395

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abstract = "A simple and power efficient scheme for input rail-to-rail Op-Amp operation with constant g m and CMRR over the common mode input range is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. Three implementations of the scheme are discussed. They use very compact control circuitry to turn only one of the differential pairs at a time. Simulations and experimental verification of the proposed scheme are provided from a test chip prototype in 0.5μm CMOS technology.",

keywords = "CMOS analogue integrated circuits, operational amplifiers, CMRR, active differential pairs, common mode input range, compact control circuitry, complementary differential pair, input rail-to-rail op-amp operation, rail-to-rail CMOS complementary input stage, size 0.5 mum, test chip prototype, CMOS integrated circuits, MOS devices, Power dissipation, Rail to rail amplifiers, Rails, Transistors, Voltage control, CMOS Op-Amps, amplifiers, analog integrated circuits, rail -to-rail",

author = "Valero, {M. R.} and A. Roman-Loera and J. Ram{\'i}rez-Angulo and N. Medrano and S. Celma",

year = "2014",

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language = "English",

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booktitle = "2014 IEEE International Symposium on Circuits and Systems (ISCAS)",

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AU - Valero, M. R.

AU - Roman-Loera, A.

AU - Ramírez-Angulo, J.

AU - Medrano, N.

AU - Celma, S.

PY - 2014/7/28

Y1 - 2014/7/28

N2 - A simple and power efficient scheme for input rail-to-rail Op-Amp operation with constant g m and CMRR over the common mode input range is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. Three implementations of the scheme are discussed. They use very compact control circuitry to turn only one of the differential pairs at a time. Simulations and experimental verification of the proposed scheme are provided from a test chip prototype in 0.5μm CMOS technology.

AB - A simple and power efficient scheme for input rail-to-rail Op-Amp operation with constant g m and CMRR over the common mode input range is introduced. The input stage uses complementary differential pairs but only one pair is active at a time. Three implementations of the scheme are discussed. They use very compact control circuitry to turn only one of the differential pairs at a time. Simulations and experimental verification of the proposed scheme are provided from a test chip prototype in 0.5μm CMOS technology.

KW - CMOS analogue integrated circuits

KW - operational amplifiers

KW - CMRR

KW - active differential pairs

KW - common mode input range

KW - compact control circuitry

KW - complementary differential pair

KW - input rail-to-rail op-amp operation

KW - rail-to-rail CMOS complementary input stage

KW - size 0.5 mum

KW - test chip prototype

KW - CMOS integrated circuits

KW - MOS devices

KW - Power dissipation

KW - Rail to rail amplifiers

KW - Rails

KW - Transistors

KW - Voltage control

KW - CMOS Op-Amps

KW - amplifiers

KW - analog integrated circuits

KW - rail -to-rail

U2 - 10.1109/ISCAS.2014.6865395

DO - 10.1109/ISCAS.2014.6865395

M3 - Chapter in a published conference proceeding

SP - 1356

EP - 1359

BT - 2014 IEEE International Symposium on Circuits and Systems (ISCAS)

PB - IEEE

CY - USA

T2 - IEEE International Symposium on Circuits and Systems (ISCAS 2014)

Y2 - 1 June 2014 through 5 June 2014

ER -

Rail-to-rail CMOS complementary input stage with alternating active differential pairs

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Conference

Keywords

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