On the study of p-channel thin-film transistors fabricated by SLS ELA crystallization techniques

M. A. Exarchos, D. C. Moschou, G. J. Papaioannou, D. N. Kouvatsos, A. Arapoyanni, A. T. Voutsas

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

The electrical characterization, in terms of drain current, of SLS ELA p-channel polysilicon TFTs is investigated. The study was based on the DLTS technique. It was found that drain current is governed by trapping/detrapping mechanisms associated to poly-Si/SiO 2 interface states. This fact is in accordance with the results of stretched exponential analysis applied on switch-ON drain current transients. DC hot carrier measurements under worse ageing condition regime were also conducted. Threshold voltage and transconductance variation revealed that hole injection towards the gate oxide is the prevailing mechanism, while poly-Si/SiO 2 interface degradation seems to be minor.

Original languageEnglish
Pages (from-to)6375-6378
Number of pages4
JournalThin Solid Films
Volume517
Issue number23
DOIs
Publication statusPublished - 1 Oct 2009

Keywords

  • DLTS
  • p-TFT reliability
  • Poly-Si TFTs
  • SLS ELA crystallization

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Materials Chemistry
  • Metals and Alloys
  • Surfaces, Coatings and Films
  • Surfaces and Interfaces

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