Abstract
Recent regulations have demanded that electronics manufacturing companies control emissions
from their products and the susceptibility of their products to emissions from other products. In
addition, unexpected product failure and the ever-present demands of technology are also forcing the
electronics industry to face the need to maintain electrical integrity.
Our investigations into high-speed design techniques have shown three major causes of failure:
emissions from interconnecting conductors; poor PCB layout and lack of technical knowledge in
electromagnetic compatibility (EMC). Catching these kinds of electrical integrity problems early in the
design phase allows designers to take timely action without jeopardising project time scales. The
work reported here presents design for manufacturing guidelines and rules to maintain electrical
integrity in printed circuit boards (PCBs). Currently, a common method for handling EMC is through
compliance testing of the final product. Similarly, noise budget is measured on finished prototypes.
Since product life cycles are reducing, dealing with EMC late in the design cycle is undesirable. The
cost of fixing may also be higher at a final stage because only a few options are available to correct
the problem. A ‘find and fix’ approach is no longer acceptable anymore.
More and more companies are facing or will soon be facing EMC and electrical integrity issues.
The majority of analysis tools available today are targeted toward simulation engineers. Such tools
are not easy to use and are dependent on the availability and accuracy of complex simulation models.
Moreover, they also tend to be ineffective on how to correct potential EMC problems.
from their products and the susceptibility of their products to emissions from other products. In
addition, unexpected product failure and the ever-present demands of technology are also forcing the
electronics industry to face the need to maintain electrical integrity.
Our investigations into high-speed design techniques have shown three major causes of failure:
emissions from interconnecting conductors; poor PCB layout and lack of technical knowledge in
electromagnetic compatibility (EMC). Catching these kinds of electrical integrity problems early in the
design phase allows designers to take timely action without jeopardising project time scales. The
work reported here presents design for manufacturing guidelines and rules to maintain electrical
integrity in printed circuit boards (PCBs). Currently, a common method for handling EMC is through
compliance testing of the final product. Similarly, noise budget is measured on finished prototypes.
Since product life cycles are reducing, dealing with EMC late in the design cycle is undesirable. The
cost of fixing may also be higher at a final stage because only a few options are available to correct
the problem. A ‘find and fix’ approach is no longer acceptable anymore.
More and more companies are facing or will soon be facing EMC and electrical integrity issues.
The majority of analysis tools available today are targeted toward simulation engineers. Such tools
are not easy to use and are dependent on the availability and accuracy of complex simulation models.
Moreover, they also tend to be ineffective on how to correct potential EMC problems.
| Original language | English |
|---|---|
| Pages | 101-105 |
| Publication status | Published - 2004 |
| Event | ECAD/ECAE2004 – 1st International Conference on Electrical/Electro¬mechanical Computer-Aided Design & Engineering - Durham, UK United Kingdom Duration: 15 Nov 2004 → 16 Nov 2004 |
Conference
| Conference | ECAD/ECAE2004 – 1st International Conference on Electrical/Electro¬mechanical Computer-Aided Design & Engineering |
|---|---|
| Country/Territory | UK United Kingdom |
| City | Durham |
| Period | 15/11/04 → 16/11/04 |
Keywords
- Design for Manufacture
- EMC
- PCB Designm