Abstract
A 533 MHz programmable phase-locked loop is designed for DDR applications using a switched current filter and implicit phase detection. The use of switched current technology allows a fully integrated loop filter which is much smaller than equivalent integrated passive filters, as a result the circuit occupies only 0.012 mm2 on a 0.12 m 1.2 V digital CMOS process.
| Original language | English |
|---|---|
| Pages (from-to) | 1297-1299 |
| Number of pages | 3 |
| Journal | Electronics Letters |
| Volume | 44 |
| Issue number | 22 |
| DOIs | |
| Publication status | Published - 2008 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering