Elimination of sign precomputation in flat CORDIC

S Suchitra; S Sneha; T Srikanthan; CT Clarke

doi:10.1109/ISCAS.2005.1465338

Elimination of sign precomputation in flat CORDIC

S Suchitra, S Sneha, T Srikanthan, CT Clarke

Department of Electronic & Electrical Engineering

Research output: Contribution to conference › Paper

Abstract

Flat CORDIC, which was originally proposed to overcome the performance limitations of iterative CORDIC, suffers from the bottleneck of sign prediction prior to the start of computations. Also, this sign precomputation unit has poor scalability. We propose a method for totally eliminating this need for sign precomputation, by directly inferring the directions of rotation from the bipolar representation of the input angle. The proposed engine was implemented using 0.35 micron technology and the resource utilization is reported.

Original language	English
DOIs	https://doi.org/10.1109/ISCAS.2005.1465338
Publication status	Published - 2005
Event	IEEE International Symposium on Circuits and Systems (ISCAS 2005) - Kobe, Japan Duration: 23 May 2005 → 26 May 2005

Conference

Conference	IEEE International Symposium on Circuits and Systems (ISCAS 2005)
Country/Territory	Japan
City	Kobe
Period	23/05/05 → 26/05/05

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10.1109/ISCAS.2005.1465338

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title = "Elimination of sign precomputation in flat CORDIC",

abstract = "Flat CORDIC, which was originally proposed to overcome the performance limitations of iterative CORDIC, suffers from the bottleneck of sign prediction prior to the start of computations. Also, this sign precomputation unit has poor scalability. We propose a method for totally eliminating this need for sign precomputation, by directly inferring the directions of rotation from the bipolar representation of the input angle. The proposed engine was implemented using 0.35 micron technology and the resource utilization is reported.",

author = "S Suchitra and S Sneha and T Srikanthan and CT Clarke",

year = "2005",

doi = "10.1109/ISCAS.2005.1465338",

language = "English",

note = "IEEE International Symposium on Circuits and Systems (ISCAS 2005) ; Conference date: 23-05-2005 Through 26-05-2005",

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TY - CONF

T1 - Elimination of sign precomputation in flat CORDIC

AU - Suchitra, S

AU - Sneha, S

AU - Srikanthan, T

AU - Clarke, CT

PY - 2005

Y1 - 2005

N2 - Flat CORDIC, which was originally proposed to overcome the performance limitations of iterative CORDIC, suffers from the bottleneck of sign prediction prior to the start of computations. Also, this sign precomputation unit has poor scalability. We propose a method for totally eliminating this need for sign precomputation, by directly inferring the directions of rotation from the bipolar representation of the input angle. The proposed engine was implemented using 0.35 micron technology and the resource utilization is reported.

AB - Flat CORDIC, which was originally proposed to overcome the performance limitations of iterative CORDIC, suffers from the bottleneck of sign prediction prior to the start of computations. Also, this sign precomputation unit has poor scalability. We propose a method for totally eliminating this need for sign precomputation, by directly inferring the directions of rotation from the bipolar representation of the input angle. The proposed engine was implemented using 0.35 micron technology and the resource utilization is reported.

UR - http://dx.doi.org/10.1109/ISCAS.2005.1465338

U2 - 10.1109/ISCAS.2005.1465338

DO - 10.1109/ISCAS.2005.1465338

M3 - Paper

T2 - IEEE International Symposium on Circuits and Systems (ISCAS 2005)

Y2 - 23 May 2005 through 26 May 2005

ER -

Elimination of sign precomputation in flat CORDIC

Abstract

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