Elimination of sign precomputation in flat CORDIC

S Suchitra, S Sneha, T Srikanthan, CT Clarke

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Abstract

Flat CORDIC, which was originally proposed to overcome the performance limitations of iterative CORDIC, suffers from the bottleneck of sign prediction prior to the start of computations. Also, this sign precomputation unit has poor scalability. We propose a method for totally eliminating this need for sign precomputation, by directly inferring the directions of rotation from the bipolar representation of the input angle. The proposed engine was implemented using 0.35 micron technology and the resource utilization is reported.
Original languageEnglish
DOIs
Publication statusPublished - 2005
EventIEEE International Symposium on Circuits and Systems (ISCAS 2005) - Kobe, Japan
Duration: 23 May 200526 May 2005

Conference

ConferenceIEEE International Symposium on Circuits and Systems (ISCAS 2005)
CountryJapan
CityKobe
Period23/05/0526/05/05

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    Suchitra, S., Sneha, S., Srikanthan, T., & Clarke, CT. (2005). Elimination of sign precomputation in flat CORDIC. Paper presented at IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. https://doi.org/10.1109/ISCAS.2005.1465338