Power switches are used as part of power-gating technique to reduce leakage power of a design. To the best of our knowledge, this is the first work in open-literature to show a systematic diagnosis method for accurately diagnosing power switches. The proposed diagnosis method utilizes recently proposed DFT solution for efficient testing of power switches in the presence of PVT variation. It divides power switches into segments such that any faulty power switch is detectable thereby achieving high diagnosis accuracy. The proposed diagnosis method has been validated through SPICE simulation using a number of ISCAS benchmarks synthesized with a 90-nm gate library. Simulation results show that when considering the influence of process variation, the worst case loss of accuracy is less than 4.5 and the worst case loss of accuracy is less than 12% when considering VT (Voltage and Temperature) variations.
|Journal||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|Publication status||Published - Feb 2014|
- sleep transistor, diagnosis, power gating, leakage power management, design for test (dft)
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- Department of Electronic & Electrical Engineering - Deputy Head of Department
- Centre for Biosensors, Bioelectronics and Biodevices (C3Bio)
- UKRI CDT in Accountable, Responsible and Transparent AI
- Centre for Autonomous Robotics (CENTAUR)
- Electronics Materials, Circuits & Systems Research Unit (EMaCS)
- Institute for Advanced Automotive Propulsion Systems (IAAPS)
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