Custom instructions with local memory elements without expensive DMA transfers

A. Prakash, T. Srikanthan, C.T. Clarke

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Traditionally, Instruction set extension (ISE) algorithms have treated memory and control flow as invalid operations during custom instruction identification to ensure deterministic latency of these extended instructions. In order to overcome these constraints some work has been done to incorporate local memory for custom instructions with memory operations. Such architectures have invariably relied on the expensive DMA protocol for data transfer. Cache-coherence management poses another challenge in such systems and requires additional hardware and/or software intervention. We propose a novel custom instruction architecture capable of incorporating certain types of memory and control-flow operations. Unlike existing architectures, the proposed design eliminates the need for expensive Direct Memory Access (DMA) transfers and additional cache management sub-systems, thereby saving significant time and energy. Our method is focused mainly on accelerating code segments with static variables as well as the ones allocated on the stack, which are widely prevalent in embedded applications. Experimental results show that the proposed method achieves a substantial performance gain of upto 47% over base processor implementation.
Original languageEnglish
Title of host publication22nd International Conference on Field Programmable Logic and Applications, FPL 2012
PublisherIEEE
Pages647-650
Number of pages4
DOIs
Publication statusPublished - Aug 2012
Event22nd International Conference on Field Programmable Logic and Applications - Oslo, Norway
Duration: 28 Aug 201230 Aug 2012

Conference

Conference22nd International Conference on Field Programmable Logic and Applications
CountryNorway
CityOslo
Period28/08/1230/08/12

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    Prakash, A., Srikanthan, T., & Clarke, C. T. (2012). Custom instructions with local memory elements without expensive DMA transfers. In 22nd International Conference on Field Programmable Logic and Applications, FPL 2012 (pp. 647-650). IEEE. https://doi.org/10.1109/FPL.2012.6339231