Constant gm rail-to-rail CMOS OpAmp with only one differential pair and switched level shifters

M. R. Valero; Antonio López-Martín; Alejandro Román-Loera; Jaime Ramírez-Angulo; Ramon G. Carvajal

doi:10.1109/ISCAS.2015.7169183

Constant gm rail-to-rail CMOS OpAmp with only one differential pair and switched level shifters

M. R. Valero, Antonio López-Martín, Alejandro Román-Loera, Jaime Ramírez-Angulo, Ramon G. Carvajal

Department of Electronic & Electrical Engineering

Research output: Chapter or section in a book/report/conference proceeding › Chapter in a published conference proceeding

2 Citations (SciVal)

Abstract

This paper introduces a simple approach for the implementation of rail-to-rail operational amplifiers (OpAmps) with constant g m using only one differential input pair. It is based on the utilization of switched voltage followers that introduce a DC level shift when the OpAmp's common mode input voltage is lower than the headroom of the input differential pair (DP). Additional circuitry is introduced in order to make the DP tail current insensitive to common mode input voltage variations. This improves CMRR and PSRR and reduces g m variations. The additional circuitry increases power dissipation by less than 20%. Simulation results are presented that verify rail-to-rail operation with ±1.65 supply voltages in 0.5μm CMOS technology.

Original language	English
Title of host publication	2015 IEEE International Symposium on Circuits and Systems (ISCAS)
Place of Publication	USA
Publisher	IEEE
Pages	2461-2464
Number of pages	4
ISBN (Electronic)	978-1-4799-8391-9
DOIs	https://doi.org/10.1109/ISCAS.2015.7169183
Publication status	Published - 30 Jul 2015
Event	ISCAS 2015: IEEE International Symposium on Circuits and Systems - Lisbon, Spain Duration: 24 May 2015 → 27 May 2015

Conference

Conference	ISCAS 2015: IEEE International Symposium on Circuits and Systems
Country/Territory	Spain
City	Lisbon
Period	24/05/15 → 27/05/15

Keywords

CMOS analogue integrated circuits
operational amplifiers
DC level shift
DP tail current
common mode input voltage variations
constant gm rail-to-rail CMOS opamp
differential input pair
power dissipation
size 0.5 mum
switched level shifters
switched voltage followers
CMOS integrated circuits
CMOS technology
Current control
Logic gates
Rails
Threshold voltage
Transistors
Amplifiers
CMOS Analog integrated circuits
low-voltage low power design
rail-to-rail amplifiers

Access to Document

10.1109/ISCAS.2015.7169183

Cite this

Constant gm rail-to-rail CMOS OpAmp with only one differential pair and switched level shifters. / Valero, M. R.; López-Martín, Antonio; Román-Loera, Alejandro et al.
2015 IEEE International Symposium on Circuits and Systems (ISCAS). USA: IEEE, 2015. p. 2461-2464.

Research output: Chapter or section in a book/report/conference proceeding › Chapter in a published conference proceeding

Valero, MR, López-Martín, A, Román-Loera, A, Ramírez-Angulo, J & Carvajal, RG 2015, Constant gm rail-to-rail CMOS OpAmp with only one differential pair and switched level shifters. in 2015 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, USA, pp. 2461-2464, ISCAS 2015: IEEE International Symposium on Circuits and Systems, Lisbon, Spain, 24/05/15. https://doi.org/10.1109/ISCAS.2015.7169183

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title = "Constant gm rail-to-rail CMOS OpAmp with only one differential pair and switched level shifters",

abstract = "This paper introduces a simple approach for the implementation of rail-to-rail operational amplifiers (OpAmps) with constant g m using only one differential input pair. It is based on the utilization of switched voltage followers that introduce a DC level shift when the OpAmp's common mode input voltage is lower than the headroom of the input differential pair (DP). Additional circuitry is introduced in order to make the DP tail current insensitive to common mode input voltage variations. This improves CMRR and PSRR and reduces g m variations. The additional circuitry increases power dissipation by less than 20%. Simulation results are presented that verify rail-to-rail operation with ±1.65 supply voltages in 0.5μm CMOS technology.",

keywords = "CMOS analogue integrated circuits, operational amplifiers, DC level shift, DP tail current, common mode input voltage variations, constant gm rail-to-rail CMOS opamp, differential input pair, power dissipation, size 0.5 mum, switched level shifters, switched voltage followers, CMOS integrated circuits, CMOS technology, Current control, Logic gates, Rails, Threshold voltage, Transistors, Amplifiers, CMOS Analog integrated circuits, low-voltage low power design, rail-to-rail amplifiers",

author = "Valero, {M. R.} and Antonio L{\'o}pez-Mart{\'i}n and Alejandro Rom{\'a}n-Loera and Jaime Ram{\'i}rez-Angulo and Carvajal, {Ramon G.}",

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doi = "10.1109/ISCAS.2015.7169183",

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booktitle = "2015 IEEE International Symposium on Circuits and Systems (ISCAS)",

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T1 - Constant gm rail-to-rail CMOS OpAmp with only one differential pair and switched level shifters

AU - Valero, M. R.

AU - López-Martín, Antonio

AU - Román-Loera, Alejandro

AU - Ramírez-Angulo, Jaime

AU - Carvajal, Ramon G.

PY - 2015/7/30

Y1 - 2015/7/30

N2 - This paper introduces a simple approach for the implementation of rail-to-rail operational amplifiers (OpAmps) with constant g m using only one differential input pair. It is based on the utilization of switched voltage followers that introduce a DC level shift when the OpAmp's common mode input voltage is lower than the headroom of the input differential pair (DP). Additional circuitry is introduced in order to make the DP tail current insensitive to common mode input voltage variations. This improves CMRR and PSRR and reduces g m variations. The additional circuitry increases power dissipation by less than 20%. Simulation results are presented that verify rail-to-rail operation with ±1.65 supply voltages in 0.5μm CMOS technology.

AB - This paper introduces a simple approach for the implementation of rail-to-rail operational amplifiers (OpAmps) with constant g m using only one differential input pair. It is based on the utilization of switched voltage followers that introduce a DC level shift when the OpAmp's common mode input voltage is lower than the headroom of the input differential pair (DP). Additional circuitry is introduced in order to make the DP tail current insensitive to common mode input voltage variations. This improves CMRR and PSRR and reduces g m variations. The additional circuitry increases power dissipation by less than 20%. Simulation results are presented that verify rail-to-rail operation with ±1.65 supply voltages in 0.5μm CMOS technology.

KW - CMOS analogue integrated circuits

KW - operational amplifiers

KW - DC level shift

KW - DP tail current

KW - common mode input voltage variations

KW - constant gm rail-to-rail CMOS opamp

KW - differential input pair

KW - power dissipation

KW - size 0.5 mum

KW - switched level shifters

KW - switched voltage followers

KW - CMOS integrated circuits

KW - CMOS technology

KW - Current control

KW - Logic gates

KW - Rails

KW - Threshold voltage

KW - Transistors

KW - Amplifiers

KW - CMOS Analog integrated circuits

KW - low-voltage low power design

KW - rail-to-rail amplifiers

U2 - 10.1109/ISCAS.2015.7169183

DO - 10.1109/ISCAS.2015.7169183

M3 - Chapter in a published conference proceeding

SP - 2461

EP - 2464

BT - 2015 IEEE International Symposium on Circuits and Systems (ISCAS)

PB - IEEE

CY - USA

T2 - ISCAS 2015: IEEE International Symposium on Circuits and Systems

Y2 - 24 May 2015 through 27 May 2015

ER -

Constant gm rail-to-rail CMOS OpAmp with only one differential pair and switched level shifters

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