TY - JOUR
T1 - Colossal Tunneling Electroresistance in Co-Planar Polymer Ferroelectric Tunnel Junctions
AU - Kumar, Manasvi
AU - Georgiadou, Dimitra G.
AU - Seitkhan, Akmaral
AU - Loganathan, Kalaivanan
AU - Yengel, Emre
AU - Faber, Hendrik
AU - Naphade, Dipti
AU - Basu, Aniruddha
AU - Anthopoulos, Thomas D.
AU - Asadi, Kamal
PY - 2020/2/1
Y1 - 2020/2/1
N2 - Ferroelectric tunnel junctions (FTJs) are ideal resistance-switching devices due to their deterministic behavior and operation at low voltages. However, FTJs have remained mostly as a scientific curiosity due to three critical issues: lack of rectification in their current-voltage characteristic, small tunneling electroresistance (TER) effect, and absence of a straightforward lithography-based device fabrication method that would allow for their mass production. Co-planar FTJs that are fabricated using wafer-scale adhesion lithography technique are demonstrated, and a bi-stable rectifying behavior with colossal TER approaching 106% at room temperature is exhibited. The FTJs are based on poly(vinylidenefluoride-co-trifluoroethylene) [P(VDF-TrFE)], and employ asymmetric co-planar metallic electrodes separated by <20 nm. The tunneling nature of the charge transport is corroborated using Simmons direct tunneling model. The present work is the first demonstration of functional FTJs manufactured via a scalable lithography-based nano-patterning technique and could pave the way to new and exciting memory device concepts.
AB - Ferroelectric tunnel junctions (FTJs) are ideal resistance-switching devices due to their deterministic behavior and operation at low voltages. However, FTJs have remained mostly as a scientific curiosity due to three critical issues: lack of rectification in their current-voltage characteristic, small tunneling electroresistance (TER) effect, and absence of a straightforward lithography-based device fabrication method that would allow for their mass production. Co-planar FTJs that are fabricated using wafer-scale adhesion lithography technique are demonstrated, and a bi-stable rectifying behavior with colossal TER approaching 106% at room temperature is exhibited. The FTJs are based on poly(vinylidenefluoride-co-trifluoroethylene) [P(VDF-TrFE)], and employ asymmetric co-planar metallic electrodes separated by <20 nm. The tunneling nature of the charge transport is corroborated using Simmons direct tunneling model. The present work is the first demonstration of functional FTJs manufactured via a scalable lithography-based nano-patterning technique and could pave the way to new and exciting memory device concepts.
KW - ferroelectrics
KW - lithography
KW - piezoelectric force microscopy
KW - polymers
KW - tunnel junctions
UR - http://www.scopus.com/inward/record.url?scp=85076747994&partnerID=8YFLogxK
U2 - 10.1002/aelm.201901091
DO - 10.1002/aelm.201901091
M3 - Article
AN - SCOPUS:85076747994
SN - 2199-160X
VL - 6
JO - Advanced Electronic Materials
JF - Advanced Electronic Materials
IS - 2
M1 - 1901091
ER -