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Abstract
Velocity-selective recording (VSR) of electroneurogram (ENG) signals is a frequently utilized technology in the field of neural recording with applications in clinical medicine and neuroprosthetics. VSR classifies excited axon populations in terms of their conduction velocities using multiple recordings of the same ENG signal and addition of the recording channels after introducing controlled time delays. This paper describes the first fully integrated analogue realization of the complete delay-and-add process with nine channels. The proposed approach uses switched-capacitor (SC) circuits and avoids the need for ADCs at the inputs of the delay-and-add circuit to achieve a small size and low power implementation. Simulated and measured results obtained from chips fabricated in 0.35 µm CMOS technology are reported. The system occupies a 1.16 mm2 active area and consumes 798 µW from a 3 V supply, while achieving a wide velocity detection range of 10–300 m/s with a precise relative velocity resolution down to 0.003. Intrinsic velocity spectra measured from synthetic ENG inputs confirm the operation of the system.
Original language | English |
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Article number | 569 |
Journal | Electronics (Switzerland) |
Volume | 13 |
Issue number | 3 |
Early online date | 31 Jan 2024 |
DOIs | |
Publication status | Published - 29 Feb 2024 |
Data Availability Statement
The original contributions presented in the study are included in the article, further inquiries can be directed to the corresponding author.Funding
This work was funded by the Deutsche Forschungsgemeinschaft (DFG, German Research Foundation)—Project-ID 434434223—SFB 1461—and by the United Kingdom Engineering and Physical Sciences Research Council (EPSRC) under grant EP/P018947/1. We acknowledge financial support by Land Schleswig-Holstein within the funding programme Open Access Publikationsfonds.
Funders | Funder number |
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Land Schleswig-Holstein | |
Engineering and Physical Sciences Research Council | EP/P018947/1 |
Deutsche Forschungsgemeinschaft | 434434223—SFB 1461— |
Keywords
- analogue delay
- integrated CMOS circuit
- switched-capacitor (SC) circuit
- velocity-selective recording (VSR)
ASJC Scopus subject areas
- Control and Systems Engineering
- Signal Processing
- Hardware and Architecture
- Computer Networks and Communications
- Electrical and Electronic Engineering
Fingerprint
Dive into the research topics of 'CMOS Analogue Velocity-Selective Neural Processing System'. Together they form a unique fingerprint.Projects
- 1 Finished
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Detecting Bladder Volume and pressure from Sacral Nerve Signals: the Key to Future Artificial Control
Taylor, J. (PI)
Engineering and Physical Sciences Research Council
1/07/17 → 31/03/21
Project: Research council