Analysis of sampling clock phase noise in homodyne FMCW radar systems

Kashif Siddiq, Robert J. Watson, Stephen R. Pennock, Philip Avery, Richard Poulton, Steve Martins

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)
180 Downloads (Pure)

Abstract

In many contemporary electronic systems, phase noise sets the bound on the achievable performance. Radar systems are no exception, with the actual radar signals carrying significant amounts of phase noise due to the high transmit frequencies. In coherent radars, some of the phase noise sidebands on the received signal are cancelled due to mixing in the receiver. The sampling clock used to sample the intermediate frequency (IF) signals also introduces phase noise/jitter. This paper focuses on the contribution of the sampling clock's phase noise to the overall phase noise in the sampled signal in coherent homodyne FMCW radar systems. We develop a model relating the phase noise in the sampled signal to the phase noise in the radar signals and the jitter in the sampling clock. We apply our analysis to example FMCW radar systems. The derived model can be used to work out the phase noise requirement on the sampling clock for a given phase noise level in radar signals.

Original languageEnglish
Title of host publication2016 IEEE Radar Conference, RadarConf 2016
PublisherIEEE
ISBN (Print)9781509008636
DOIs
Publication statusPublished - 9 Jun 2016
Event2016 IEEE Radar Conference, RadarConf 2016 - Philadelphia, USA United States
Duration: 2 May 20166 May 2016

Publication series

NameRadar Conference
PublisherIEEE
ISSN (Electronic)2375-5318

Conference

Conference2016 IEEE Radar Conference, RadarConf 2016
CountryUSA United States
CityPhiladelphia
Period2/05/166/05/16

Fingerprint

Radar systems
Phase noise
Clocks
Sampling
Radar
Jitter

Cite this

Siddiq, K., Watson, R. J., Pennock, S. R., Avery, P., Poulton, R., & Martins, S. (2016). Analysis of sampling clock phase noise in homodyne FMCW radar systems. In 2016 IEEE Radar Conference, RadarConf 2016 [7485302] (Radar Conference). IEEE. https://doi.org/10.1109/RADAR.2016.7485302

Analysis of sampling clock phase noise in homodyne FMCW radar systems. / Siddiq, Kashif; Watson, Robert J.; Pennock, Stephen R.; Avery, Philip; Poulton, Richard; Martins, Steve.

2016 IEEE Radar Conference, RadarConf 2016. IEEE, 2016. 7485302 (Radar Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Siddiq, K, Watson, RJ, Pennock, SR, Avery, P, Poulton, R & Martins, S 2016, Analysis of sampling clock phase noise in homodyne FMCW radar systems. in 2016 IEEE Radar Conference, RadarConf 2016., 7485302, Radar Conference, IEEE, 2016 IEEE Radar Conference, RadarConf 2016, Philadelphia, USA United States, 2/05/16. https://doi.org/10.1109/RADAR.2016.7485302
Siddiq K, Watson RJ, Pennock SR, Avery P, Poulton R, Martins S. Analysis of sampling clock phase noise in homodyne FMCW radar systems. In 2016 IEEE Radar Conference, RadarConf 2016. IEEE. 2016. 7485302. (Radar Conference). https://doi.org/10.1109/RADAR.2016.7485302
Siddiq, Kashif ; Watson, Robert J. ; Pennock, Stephen R. ; Avery, Philip ; Poulton, Richard ; Martins, Steve. / Analysis of sampling clock phase noise in homodyne FMCW radar systems. 2016 IEEE Radar Conference, RadarConf 2016. IEEE, 2016. (Radar Conference).
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