An improved push-pull driver using 0.13μm CMOS

Ke Li; Peter Wilson

doi:10.1109/ISCAS.2013.6572252

An improved push-pull driver using 0.13μm CMOS

Department of Electronic & Electrical Engineering

University of Southampton

Research output: Chapter or section in a book/report/conference proceeding › Chapter in a published conference proceeding

7 Citations (SciVal)

Abstract

High speed, large voltage swing, low power and robust driver circuit is required for the recent silicon photonics based optical link. Unlike the popular CML approach; this work applies the replica biasing function to cascoded push pull driver. We demonstrate that the proposed approach significantly increases the speed of driver, moderately decreases the power consumption, and strengthen the robustness of driver. Two different design examples are fabricated using IBM-8RF 1P8M 0.13μm CMOS process. At typical process corner, post layout simulation results show that when driving 50 Ohm load at the speed of 10 GB/s, the proposed driver can provide 16dB gain with its output voltage swing at 4.0 Vpp (differential) and the power consumption less than 262mW.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems (ISCAS), 2013
Place of Publication	U. S. A.
Publisher	IEEE
Pages	1958-1961
Number of pages	4
ISBN (Print)	9781467357609
DOIs	https://doi.org/10.1109/ISCAS.2013.6572252
Publication status	Published - 9 Sept 2013
Event	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China Duration: 19 May 2013 → 23 May 2013

Conference

Conference	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Country/Territory	China
City	Beijing
Period	19/05/13 → 23/05/13

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/ISCAS.2013.6572252

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title = "An improved push-pull driver using 0.13μm CMOS",

abstract = "High speed, large voltage swing, low power and robust driver circuit is required for the recent silicon photonics based optical link. Unlike the popular CML approach; this work applies the replica biasing function to cascoded push pull driver. We demonstrate that the proposed approach significantly increases the speed of driver, moderately decreases the power consumption, and strengthen the robustness of driver. Two different design examples are fabricated using IBM-8RF 1P8M 0.13μm CMOS process. At typical process corner, post layout simulation results show that when driving 50 Ohm load at the speed of 10 GB/s, the proposed driver can provide 16dB gain with its output voltage swing at 4.0 Vpp (differential) and the power consumption less than 262mW.",

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AU - Wilson, Peter

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AB - High speed, large voltage swing, low power and robust driver circuit is required for the recent silicon photonics based optical link. Unlike the popular CML approach; this work applies the replica biasing function to cascoded push pull driver. We demonstrate that the proposed approach significantly increases the speed of driver, moderately decreases the power consumption, and strengthen the robustness of driver. Two different design examples are fabricated using IBM-8RF 1P8M 0.13μm CMOS process. At typical process corner, post layout simulation results show that when driving 50 Ohm load at the speed of 10 GB/s, the proposed driver can provide 16dB gain with its output voltage swing at 4.0 Vpp (differential) and the power consumption less than 262mW.

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M3 - Chapter in a published conference proceeding

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ER -

An improved push-pull driver using 0.13μm CMOS

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