The effect of optimising the transistor finger width on the performance of high-speed analogue circuits in deep sub-micron processes is investigated, demonstrated in a 28 nm high-K/metal gate CMOS technology process. Silicon proven results demonstrate that the oscillator with a finger width of 440 nm gives the best performance based on the figure of merit (=142) among the benchmark design examples used.
|Number of pages||3|
|Early online date||8 Mar 2018|
|Publication status||Published - 19 Apr 2018|
ASJC Scopus subject areas
- Electrical and Electronic Engineering