A reconfigurable architecture for real-time digital simulation of neurons

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A major problem in computational neuroscience is the large scale biologically realistic neuron simulations which require massive amount of computing resources, which in turn requires large amount of power. This poses a significant problem when we look towards a potential future where machines have 'silicon brains'. In this paper we build on previous VHDL neuron work by building a programmable neuron device housing 116 neurons and 200 synapses to perform realistic, real-time simulations of neuron networks in hardware. This flexible architecture is loaded with the C. Elegans locomotion system that demonstrates that the behavior of the programmable architecture is the same as the behavior of the design from previous work.

Original languageEnglish
Title of host publication2017 Intelligent Systems Conference, IntelliSys 2017
PublisherIEEE
Pages66-75
Number of pages10
Volume2018-January
ISBN (Electronic)9781509064359
DOIs
Publication statusPublished - 23 Mar 2018
Event2017 Intelligent Systems Conference, IntelliSys 2017 - London, UK United Kingdom
Duration: 7 Sep 20178 Sep 2017

Conference

Conference2017 Intelligent Systems Conference, IntelliSys 2017
CountryUK United Kingdom
CityLondon
Period7/09/178/09/17

Fingerprint

Reconfigurable architectures
Reconfigurable Architectures
Digital Simulation
Neurons
Neuron
Real-time
Computational Neuroscience
Computer hardware description languages
Synapse
Locomotion
Brain
Silicon
Simulation
Hardware
Resources
Computing
Demonstrate

Keywords

  • hardware
  • network
  • Neuron
  • programmable
  • simulation

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Networks and Communications
  • Artificial Intelligence
  • Computer Vision and Pattern Recognition
  • Control and Optimization

Cite this

Wilson, P., Metcalfe, B., Graham-Harper-Cater, J., & Bailey, J. A. (2018). A reconfigurable architecture for real-time digital simulation of neurons. In 2017 Intelligent Systems Conference, IntelliSys 2017 (Vol. 2018-January, pp. 66-75). IEEE. https://doi.org/10.1109/IntelliSys.2017.8324340

A reconfigurable architecture for real-time digital simulation of neurons. / Wilson, Peter; Metcalfe, Benjamin; Graham-Harper-Cater, Jonathan; Bailey, Julian A.

2017 Intelligent Systems Conference, IntelliSys 2017. Vol. 2018-January IEEE, 2018. p. 66-75.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Wilson, P, Metcalfe, B, Graham-Harper-Cater, J & Bailey, JA 2018, A reconfigurable architecture for real-time digital simulation of neurons. in 2017 Intelligent Systems Conference, IntelliSys 2017. vol. 2018-January, IEEE, pp. 66-75, 2017 Intelligent Systems Conference, IntelliSys 2017, London, UK United Kingdom, 7/09/17. https://doi.org/10.1109/IntelliSys.2017.8324340
Wilson P, Metcalfe B, Graham-Harper-Cater J, Bailey JA. A reconfigurable architecture for real-time digital simulation of neurons. In 2017 Intelligent Systems Conference, IntelliSys 2017. Vol. 2018-January. IEEE. 2018. p. 66-75 https://doi.org/10.1109/IntelliSys.2017.8324340
Wilson, Peter ; Metcalfe, Benjamin ; Graham-Harper-Cater, Jonathan ; Bailey, Julian A. / A reconfigurable architecture for real-time digital simulation of neurons. 2017 Intelligent Systems Conference, IntelliSys 2017. Vol. 2018-January IEEE, 2018. pp. 66-75
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