Abstract
This paper provides an implementation of a novel signal processing co-processor using a Geometric Algebra technique tailored for fast and complex geometric calculations in multiple dimensions. This is the first hardware implementation of Geometric Algebra to specifically address the issue of scalability to multiple (1 - 8) dimensions. This paper presents a detailed description of the implementation, with a particular focus on the techniques of optimization used to improve performance. Results are presented which demonstrate at least 3x performance improvements compared to previously published work.
| Original language | English |
|---|---|
| Pages (from-to) | 274-291 |
| Number of pages | 17 |
| Journal | Circuits and Systems |
| Volume | 5 |
| Issue number | 11 |
| DOIs | |
| Publication status | Published - 30 Nov 2014 |
Keywords
- Geometric Algebra
- Clifford algebra
- FPGA
- GA Co-processor
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Peter Wilson
- Department of Electronic & Electrical Engineering - Professor, Professor (Visiting )
- Centre for Digital, Manufacturing & Design (dMaDe)
- Institute of Sustainability and Climate Change
Person: Research & Teaching, Core staff, Affiliate staff, Honorary / Visiting Staff