A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp

M. R. Valero, S. Celma, N. Medrano, B. Calvo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents an ultra low power rail-to-rail input/output operational amplifier (OpAmp) designed in a low cost 0.18 μm CMOS technology. In this OpAmp, rail-to-rail input operation is enabled by using complementary input pairs with gcontrol. To maximize the output swing a rail-to-rail output stage is employed. For low-voltage low-power operation, the operating transistors in the input and output stage are biased in the sub-threshold region. The simulated DC open loop gain is 51 dB, and the slew-rate is 0.04 V/μs with a 10 pF capacitive load connected to each of the amplifier outputs. For the same load, the simulated unity gain frequency is 131 kHz with a 64° phase margin. A common-mode feed-forward circuit (CMFF) increases CMRR, reducing drastically the variations in the output common mode voltage and keeping the DC gain almost constant. In fact, their relative error remains below 1.2 % for a (-20°C, +120°C) temperature span. In addition, the proposed OpAmp is very simple and consumes only 4 μW at 0.8 V supply.
Original languageEnglish
Title of host publicationProceedings of the 7th Conference on Ph.D. Research in Microelectronics and Electronics
PublisherIEEE
Pages137-140
Number of pages4
DOIs
Publication statusPublished - 29 Jul 2011
Event2011 7th Conference on Ph.D. Research in Microelectronics and Electronics - Trento, Italy
Duration: 3 Jul 20117 Jul 2011

Conference

Conference2011 7th Conference on Ph.D. Research in Microelectronics and Electronics
CountryItaly
CityTrento
Period3/07/117/07/11

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Keywords

  • CMOS analogue integrated circuits
  • differential amplifiers
  • low-power electronics
  • operational amplifiers
  • common mode voltage
  • common-mode feedforward circuit
  • frequency 131 kHz
  • gain 51 dB
  • low cost CMOS technology
  • operating transistors
  • operational amplifier
  • phase margin
  • power 4 muW
  • rail-to-rail input-output CMOS fully differential OpAmp
  • simulated DC open loop gain
  • simulated unity gain frequency
  • size 0.18 mum
  • slew-rate
  • temperature -20 degC
  • temperature 120 degC
  • voltage 0.8 V
  • CMOS integrated circuits
  • Gain
  • MOS devices
  • Operational amplifiers
  • Rail to rail inputs
  • Transconductance
  • Transistors
  • Fully Differential OpAmp
  • Low-voltage Low-power CMOS Design
  • Rail-to-Rail OpAmp

Cite this

Valero, M. R., Celma, S., Medrano, N., & Calvo, B. (2011). A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp. In Proceedings of the 7th Conference on Ph.D. Research in Microelectronics and Electronics (pp. 137-140). IEEE. https://doi.org/10.1109/PRIME.2011.5966236