A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp

M. R. Valero; S. Celma; N. Medrano; B. Calvo

doi:10.1109/PRIME.2011.5966236

A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp

M. R. Valero, S. Celma, N. Medrano, B. Calvo

Department of Electronic & Electrical Engineering

Research output: Chapter or section in a book/report/conference proceeding › Chapter in a published conference proceeding

2 Citations (SciVal)

Abstract

This paper presents an ultra low power rail-to-rail input/output operational amplifier (OpAmp) designed in a low cost 0.18 μm CMOS technology. In this OpAmp, rail-to-rail input operation is enabled by using complementary input pairs with gcontrol. To maximize the output swing a rail-to-rail output stage is employed. For low-voltage low-power operation, the operating transistors in the input and output stage are biased in the sub-threshold region. The simulated DC open loop gain is 51 dB, and the slew-rate is 0.04 V/μs with a 10 pF capacitive load connected to each of the amplifier outputs. For the same load, the simulated unity gain frequency is 131 kHz with a 64° phase margin. A common-mode feed-forward circuit (CMFF) increases CMRR, reducing drastically the variations in the output common mode voltage and keeping the DC gain almost constant. In fact, their relative error remains below 1.2 % for a (-20°C, +120°C) temperature span. In addition, the proposed OpAmp is very simple and consumes only 4 μW at 0.8 V supply.

Original language	English
Title of host publication	Proceedings of the 7th Conference on Ph.D. Research in Microelectronics and Electronics
Publisher	IEEE
Pages	137-140
Number of pages	4
DOIs	https://doi.org/10.1109/PRIME.2011.5966236
Publication status	Published - 29 Jul 2011
Event	2011 7th Conference on Ph.D. Research in Microelectronics and Electronics - Trento, Italy Duration: 3 Jul 2011 → 7 Jul 2011

Conference

Conference	2011 7th Conference on Ph.D. Research in Microelectronics and Electronics
Country/Territory	Italy
City	Trento
Period	3/07/11 → 7/07/11

Keywords

CMOS analogue integrated circuits
differential amplifiers
low-power electronics
operational amplifiers
common mode voltage
common-mode feedforward circuit
frequency 131 kHz
gain 51 dB
low cost CMOS technology
operating transistors
operational amplifier
phase margin
power 4 muW
rail-to-rail input-output CMOS fully differential OpAmp
simulated DC open loop gain
simulated unity gain frequency
size 0.18 mum
slew-rate
temperature -20 degC
temperature 120 degC
voltage 0.8 V
CMOS integrated circuits
Gain
MOS devices
Operational amplifiers
Rail to rail inputs
Transconductance
Transistors
Fully Differential OpAmp
Low-voltage Low-power CMOS Design
Rail-to-Rail OpAmp

Access to Document

10.1109/PRIME.2011.5966236

Cite this

Valero, MR, Celma, S, Medrano, N & Calvo, B 2011, A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp. in Proceedings of the 7th Conference on Ph.D. Research in Microelectronics and Electronics. IEEE, pp. 137-140, 2011 7th Conference on Ph.D. Research in Microelectronics and Electronics, Trento, Italy, 3/07/11. https://doi.org/10.1109/PRIME.2011.5966236

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title = "A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp",

abstract = "This paper presents an ultra low power rail-to-rail input/output operational amplifier (OpAmp) designed in a low cost 0.18 μm CMOS technology. In this OpAmp, rail-to-rail input operation is enabled by using complementary input pairs with gcontrol. To maximize the output swing a rail-to-rail output stage is employed. For low-voltage low-power operation, the operating transistors in the input and output stage are biased in the sub-threshold region. The simulated DC open loop gain is 51 dB, and the slew-rate is 0.04 V/μs with a 10 pF capacitive load connected to each of the amplifier outputs. For the same load, the simulated unity gain frequency is 131 kHz with a 64° phase margin. A common-mode feed-forward circuit (CMFF) increases CMRR, reducing drastically the variations in the output common mode voltage and keeping the DC gain almost constant. In fact, their relative error remains below 1.2 % for a (-20°C, +120°C) temperature span. In addition, the proposed OpAmp is very simple and consumes only 4 μW at 0.8 V supply.",

keywords = "CMOS analogue integrated circuits, differential amplifiers, low-power electronics, operational amplifiers, common mode voltage, common-mode feedforward circuit, frequency 131 kHz, gain 51 dB, low cost CMOS technology, operating transistors, operational amplifier, phase margin, power 4 muW, rail-to-rail input-output CMOS fully differential OpAmp, simulated DC open loop gain, simulated unity gain frequency, size 0.18 mum, slew-rate, temperature -20 degC, temperature 120 degC, voltage 0.8 V, CMOS integrated circuits, Gain, MOS devices, Operational amplifiers, Rail to rail inputs, Transconductance, Transistors, Fully Differential OpAmp, Low-voltage Low-power CMOS Design, Rail-to-Rail OpAmp",

author = "Valero, {M. R.} and S. Celma and N. Medrano and B. Calvo",

year = "2011",

month = jul,

day = "29",

doi = "10.1109/PRIME.2011.5966236",

language = "English",

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booktitle = "Proceedings of the 7th Conference on Ph.D. Research in Microelectronics and Electronics",

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T1 - A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp

AU - Valero, M. R.

AU - Celma, S.

AU - Medrano, N.

AU - Calvo, B.

PY - 2011/7/29

Y1 - 2011/7/29

N2 - This paper presents an ultra low power rail-to-rail input/output operational amplifier (OpAmp) designed in a low cost 0.18 μm CMOS technology. In this OpAmp, rail-to-rail input operation is enabled by using complementary input pairs with gcontrol. To maximize the output swing a rail-to-rail output stage is employed. For low-voltage low-power operation, the operating transistors in the input and output stage are biased in the sub-threshold region. The simulated DC open loop gain is 51 dB, and the slew-rate is 0.04 V/μs with a 10 pF capacitive load connected to each of the amplifier outputs. For the same load, the simulated unity gain frequency is 131 kHz with a 64° phase margin. A common-mode feed-forward circuit (CMFF) increases CMRR, reducing drastically the variations in the output common mode voltage and keeping the DC gain almost constant. In fact, their relative error remains below 1.2 % for a (-20°C, +120°C) temperature span. In addition, the proposed OpAmp is very simple and consumes only 4 μW at 0.8 V supply.

AB - This paper presents an ultra low power rail-to-rail input/output operational amplifier (OpAmp) designed in a low cost 0.18 μm CMOS technology. In this OpAmp, rail-to-rail input operation is enabled by using complementary input pairs with gcontrol. To maximize the output swing a rail-to-rail output stage is employed. For low-voltage low-power operation, the operating transistors in the input and output stage are biased in the sub-threshold region. The simulated DC open loop gain is 51 dB, and the slew-rate is 0.04 V/μs with a 10 pF capacitive load connected to each of the amplifier outputs. For the same load, the simulated unity gain frequency is 131 kHz with a 64° phase margin. A common-mode feed-forward circuit (CMFF) increases CMRR, reducing drastically the variations in the output common mode voltage and keeping the DC gain almost constant. In fact, their relative error remains below 1.2 % for a (-20°C, +120°C) temperature span. In addition, the proposed OpAmp is very simple and consumes only 4 μW at 0.8 V supply.

KW - CMOS analogue integrated circuits

KW - differential amplifiers

KW - low-power electronics

KW - operational amplifiers

KW - common mode voltage

KW - common-mode feedforward circuit

KW - frequency 131 kHz

KW - gain 51 dB

KW - low cost CMOS technology

KW - operating transistors

KW - operational amplifier

KW - phase margin

KW - power 4 muW

KW - rail-to-rail input-output CMOS fully differential OpAmp

KW - simulated DC open loop gain

KW - simulated unity gain frequency

KW - size 0.18 mum

KW - slew-rate

KW - temperature -20 degC

KW - temperature 120 degC

KW - voltage 0.8 V

KW - CMOS integrated circuits

KW - Gain

KW - MOS devices

KW - Operational amplifiers

KW - Rail to rail inputs

KW - Transconductance

KW - Transistors

KW - Fully Differential OpAmp

KW - Low-voltage Low-power CMOS Design

KW - Rail-to-Rail OpAmp

U2 - 10.1109/PRIME.2011.5966236

DO - 10.1109/PRIME.2011.5966236

M3 - Chapter in a published conference proceeding

SP - 137

EP - 140

BT - Proceedings of the 7th Conference on Ph.D. Research in Microelectronics and Electronics

PB - IEEE

T2 - 2011 7th Conference on Ph.D. Research in Microelectronics and Electronics

Y2 - 3 July 2011 through 7 July 2011

ER -

A 4-µW 0.8-V rail-to-rail input/output CMOS fully differential OpAmp

Abstract

Conference

Keywords

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