TY - JOUR
T1 - A 230-nW 10-s time constant CMOS integrator for an adaptive nerve signal amplifier
AU - Rieger, R
AU - Demosthenous, A
AU - Taylor, J
N1 - ID number: ISI:000224692400017
PY - 2004
Y1 - 2004
N2 - This paper describes a micropower CMOS integrator with an extremely large time constant for use in a variety of low-frequency signal processing applications. The specific use of the integrator in an implantable biomedical integrated circuit is described. The integrator is based on the OTA-C approach and a very small transconductance of 100 pA/V was achieved by cascading a short chain of transconductance-transimpedance stages. The time constant of the integrator is tunable between about 0.2 and 10 s, and any offset voltages at the output terminal can be trimmed out. The circuit was fabricated in a 0.8-mum CMOS process, dissipates 230 nW from +/-1.5 V power supplies (excluding the bias circuitry and output buffers) and has a core area of 0.1 mm(2). The integrator offers superior performance in terms of power consumption, die area and time constant when compared to previously published work.
AB - This paper describes a micropower CMOS integrator with an extremely large time constant for use in a variety of low-frequency signal processing applications. The specific use of the integrator in an implantable biomedical integrated circuit is described. The integrator is based on the OTA-C approach and a very small transconductance of 100 pA/V was achieved by cascading a short chain of transconductance-transimpedance stages. The time constant of the integrator is tunable between about 0.2 and 10 s, and any offset voltages at the output terminal can be trimmed out. The circuit was fabricated in a 0.8-mum CMOS process, dissipates 230 nW from +/-1.5 V power supplies (excluding the bias circuitry and output buffers) and has a core area of 0.1 mm(2). The integrator offers superior performance in terms of power consumption, die area and time constant when compared to previously published work.
UR - http://dx.doi.org/10.1109/jssc.2004.835818
U2 - 10.1109/jssc.2004.835818
DO - 10.1109/jssc.2004.835818
M3 - Article
SN - 0018-9200
VL - 39
SP - 1968
EP - 1975
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 11
ER -