A 1.2 V low-power OpAmp for integrated lock-in amplifiers

M. R. Valero, S. Celma, N. Medrano, B. Calvo, C. Gimeno

Research output: Chapter or section in a book/report/conference proceedingChapter in a published conference proceeding

1 Citation (SciVal)


This paper presents a simple 1.2 V low-power rail-to-rail class AB operational amplifier (OpAmp) suitable for integrated lock-in amplifiers. The proposed OpAmp has been designed in a standard 0.18 μm CMOS technology. For a 1.2 V single supply and 68.6 μW power consumption, simulations shows a 81 dB open loop gain, 64° phase margin, 13 MHz unity gain frequency for a capacitive load of 10pF and 75 dB CMRR. Adaptive biasing provides 30.7 V/μs slew-rate for a 10 pF load. A compact and reliable lock-in amplifier (LIA) has been designed using the proposed circuit. The designed LIA has a power consumption of 135 μW and recovers signals up to 1 MHz with relative errors below 2.6 % for noise and interference signals of the same amplitude as the signal of interest.

Original languageEnglish
Title of host publicationVLSI Circuits and Systems VI: Proceedings
ISBN (Print)9780819495617
Publication statusPublished - 12 Aug 2013
Event6th Conference on VLSI Circuits and Systems - Grenoble, France
Duration: 24 Apr 201326 Apr 2013


Conference6th Conference on VLSI Circuits and Systems


  • Amplifiers
  • Analog circuits
  • CMOS integrated circuits
  • Lock-in amplifiers
  • Low-voltage low-power design

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering


Dive into the research topics of 'A 1.2 V low-power OpAmp for integrated lock-in amplifiers'. Together they form a unique fingerprint.

Cite this