A 100 Mb/s, 2.8 V CMOS current-mode analogue Viterbi decoder (invited paper)

A Demosthenous, JT Taylor

Research output: Contribution to journal › Article

25 Citations (Scopus)
Original languageEnglish
Pages (from-to)904-910
Number of pages7
JournalIEEE Journal of Solid-State Circuits (JSSC)
Volume37
Issue number7
Publication statusPublished - 2002

Cite this

A 100 Mb/s, 2.8 V CMOS current-mode analogue Viterbi decoder (invited paper). / Demosthenous, A; Taylor, JT.

In: IEEE Journal of Solid-State Circuits (JSSC), Vol. 37, No. 7, 2002, p. 904-910.

Research output: Contribution to journal › Article

Demosthenous, A & Taylor, JT 2002, 'A 100 Mb/s, 2.8 V CMOS current-mode analogue Viterbi decoder (invited paper)', IEEE Journal of Solid-State Circuits (JSSC), vol. 37, no. 7, pp. 904-910.
Demosthenous A, Taylor JT. A 100 Mb/s, 2.8 V CMOS current-mode analogue Viterbi decoder (invited paper). IEEE Journal of Solid-State Circuits (JSSC). 2002;37(7):904-910.
Demosthenous, A ; Taylor, JT. / A 100 Mb/s, 2.8 V CMOS current-mode analogue Viterbi decoder (invited paper). In: IEEE Journal of Solid-State Circuits (JSSC). 2002 ; Vol. 37, No. 7. pp. 904-910.
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