Abstract
This paper presents an ultra low-power rail-to-rail fully differential operational amplifier (OpAmp) fabricated in a standard 0.18 μm CMOS technology. The proposed circuit uses transistors biased in the sub-threshold region for low-voltage low-power operation. For a 0.8 V single supply and 8 pF loads, experimental measurements shows a 51 dB open loop gain, 62° phase margin, 57 kHz unity gain frequency and a 750 mV linear output swing. Adaptive biasing provides 0.14 V/μs slew-rate, while a 73 dB CMRR is achieved thanks to a CMFF circuit, demonstrating the correct functionality of the OpAmp with a power consumption of 1.2 μW.
Original language | English |
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Title of host publication | 2012 Proceedings of the ESSCIRC (ESSCIRC) |
Publisher | IEEE |
Pages | 77-80 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 12 Nov 2012 |
Event | 38th European Solid-State Circuit Conference - Bordeaux Convention Centre, Bordeaux, France Duration: 18 Sept 2012 → 20 Sept 2012 |
Conference
Conference | 38th European Solid-State Circuit Conference |
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Abbreviated title | ESSCIRC 2012 |
Country/Territory | France |
City | Bordeaux |
Period | 18/09/12 → 20/09/12 |
Keywords
- CMOS analogue integrated circuits
- differential amplifiers
- low-power electronics
- operational amplifiers
- transistor circuits
- CMFF circuit
- CMOS technology
- OpAmp
- adaptive biasing
- frequency 57 kHz
- gain 51 dB
- linear output swing
- low-voltage low-power operation
- power 1.2 muW
- power consumption
- size 0.18 mum
- slew-rate
- subthreshold region
- transistor biasing
- ultra low-power rail-to-rail fully differential operational amplifier
- voltage 0.8 V
- voltage 750 mV
- CMOS integrated circuits
- Gain
- Operational amplifiers
- Rail to rail inputs
- Temperature measurement
- Transistors
- Voltage measurement